Reordering method of test set based on vector eigenvalues using critical area estimation (2024)

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Authors: Wenfa Zhan and Luping Zhang

Published: 02 July 2024 Publication History

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    Abstract

    With the continuous shrinkage of integrated circuit feature sizes, circuit design has become increasingly complex, leading to issues such as rising test complexity and inefficiency. A dynamic adjustment method of test vectors for effective transistor critical area coverage based on the internal structure of the circuit is proposed. The test quality of the test vector is measured in terms of the transistor feature size relative to the size of the circuit unit. First, this method comprehensively considers the problem of circuit complexity. The test eigenvalue of each test vector is comprehensively calculated based on the overall test results. Then, the test vectors are sorted from the highest to the lowest test quality. Furthermore, during the testing process, the order of the test vectors is dynamically adjusted according to the eigenvalues of the test vectors. This method can significantly reduce the test time for failed integrated circuits. Experiments using ISCAS 89 and ITC 99 circuits show that the test process after reordering reduces the test time by 37.98% and 36.15%, respectively. Therefore, the test efficiency of the chip is improved and the test cost is optimized.

    Highlights

    This paper provides test cost reduction without increasing the defect level obviously.

    Test time and test quality have been greatly improved.

    This method shows superior effects on large-scale circuits; the larger the scale, the better the performance.

    A mathematical model of the internal structure of the transistor was developed to measure the quality of the test, making it applicable.

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    Information & Contributors

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    Published In

    Reordering method of test set based on vector eigenvalues using critical area estimation (1)

    Integration, the VLSI Journal Volume 96, Issue C

    May 2024

    351 pages

    ISSN:0167-9260

    Issue’s Table of Contents

    Elsevier B.V.

    Publisher

    Elsevier Science Publishers B. V.

    Netherlands

    Publication History

    Published: 02 July 2024

    Author Tags

    1. Circuit complexity
    2. Test reordering
    3. Feature size
    4. Test eigenvalues

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